MB95FV100D-102中文资料富士通数据手册PDF规格书

■ DESCRIPTION

The MB95120 series is general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers contain a variety of peripheral functions.

■ FEATURE

• F2MC-8FX CPU core

Instruction set optimized for controllers

• Multiplication and division instructions

• 16-bit arithmetic operations

• Bit test branch instruction

• Bit manipulation instructions etc.

• Clock

• Main clock

• Main PLL clock

• Sub clock

• Sub PLL clock

• Timer

• 8/16-bit compound timer × 2 channels

• 16-bit reload timer

• 8/16-bit PPG × 2 channels

• 16-bit PPG × 2 channels

• Timebase timer

• Watch prescaler

• LIN-UART

• Full duplex double buffer

• Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable

• UART/SIO

• Full duplex double buffer

• Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable

• I2C*

• Built-in wake-up function

• External interrupt

• Interrupt by edge detection (rising, falling, or both edges can be selected)

• Can be used to recover from low-power consumption (standby) modes.

• 8/10-bit A/D converter

• 8-bit or 10-bit resolution can be selected

• LCD controller (LCDC)

• 40 SEG × 4 COM (Max 160 pixels)

• With blinking function

• Built-in division resistance for LCD drive/booster : selected by mask option

• Low-power consumption (standby) mode

• Stop mode

• Sleep mode

• Watch mode

• Timebase timer mode

• I/O port

• The number of maximum ports : Max 87

• Port configuration

• General-purpose I/O ports (N-ch open drain) : 2 ports

• General-purpose I/O ports (CMOS) : 85 ports

• Programmable input voltage levels of port

• CMOS input level / hysteresis input level

• Dual operation Flash memory

• Erase/write and read can be executed in the different bank (Upper Bank/Lower Bank) at the same time.

• Flash memory security function

Protects the content of Flash memory (Flash memory product only)