MB91110中文资料富士通数据手册PDF规格书

■DESCRIPTION

The MB91110 series is a standard single-chip micro controller featuring various I/O resources and bus control mechanisms to incorporate the control with required for high performance high-speed CPU processes, having a 32-bit RISC CPU (FR30 series) in its core. Although external bus access is the basis for supporting a large address space accessible by a 32-bit CPU, a 1-KB instruction cache memory has been built-in to increase the instruction/execution speed of the CPU.

This unit features the optimal specifications for incorporating applications that require high performance CPU processing power such as navigation systems, high performance facsimile systems, printer control, etc.

■FEATURES

FR30CPU

• 32-bit RISC, load / store architecture, 5-level pipeline

• Operating frequency : external 25 MHz, internal 50 MHz

• Multi-purpose register : 32 bits ×16

• 16-bit fixed length instructions (basic instruction) , 1 instruction per cycle

• Instructions for barrel shift, bit processing and inter memory transfers : Instructions suited to loading purposes

• Function entry / exit instruction, multi load / store instruction of register details : Instruction capable of handling High level language instruction.

• Register Interlock function : Simplification of assembler description

• Branch instruction with delay slot : Reduction in overheads in case of branching

• Multiplier is built-in / Supported at instruction level

Signed 32-bit multiplication : 5 cycles

Signed 16-bit multiplication : 3 cycles

• Interruption (saving PC and PS) : 6 cycles, 16 priority levels