MB90980中文资料富士通数据手册PDF规格书

■ DESCRIPTION

The MB90980 series is a 16-bit general-purpose FUJITSU microcontroller designed for process control in consumer devices and other applications requiring high-speed real-time processing.

The F2MC-16LX CPU core instruction set retains the AT architecture of the F2MC*1 family, with additional instructions for high-level languages, expanded addressing mode, enhanced multiply-drive instructions, and complete bit processing. In addition, a 32-bit accumulator is provided to enable long-word processing.

The MB90980 series features embedded peripheral resources including 8/16-bit PPG, expanded I/O serial interface, UART, 10-bit A/D converter, 16-bit I/O timer, 8/16-bit up/down-counter, PWC timer, I2C*2 interface, DTP/external interrupt, chip select, and 16-bit reload timer.

■ FEATURES

• Clock

• Minimum instruction execution time:

40.0 ns/6.25 MHz base frequency multiplied × 4 (25 MHz internal operating frequency/3.3 V ± 0.3 V)

62.5 ns/4 MHz base frequency multiplied × 4 (16 MHz internal operating frequency/3.0 V ± 0.3 V)

PLL clock multiplier

• Maximum memory space

• 16 Mbytes

• Instruction set optimized for controller applications

• Supported data types (bit, byte, word, or long word)

• Typical addressing modes (23 types)

• Enhanced signed multiplication/division instruction and RETI instruction functions

• 32-bit accumulator for enhanced high-precision calculation

• Instruction set designed for high-level language (C) and multi-task operations

• System stack pointer adopted

• Instruction set compatibility and barrel shift instructions

• Enhanced execution speed

• 4 byte instruction queue

• Enhanced interrupt functions

• 8 levels setting with programmable priority, 8 external interrupt pins

• Data transmission function (µDMAC)

• Up to 16 channels

• Embedded ROM

• Flash versions : 192 Kbytes, Mask versions : 128 Kbytes

• Embedded RAM

• Flash versions : 12 Kbytes, Mask versions : 10 Kbytes

• General purpose ports

• Up to 48 ports

(10 ports with output open-drain settings)

• 8/10-bit A/D converter

• 8-channel RC sequential comparison type (10-bit resolution, 3.68 µs conversion time (at 25 MHz) )

• I2C interface

• 1 channel, P76/P77 N-ch open drain pin (without P-ch)

• UART

• 1 channel

• Extended I/O serial interface (SIO)

• 2 channels

• 8/16-bit PPG

• 2 channels (with 8-bit × 4 channels/16-bit × 2 channels mode switching function)

• 8/16-bit up/down timer

• 1 channel (with 8-bit × 2 channels/16-bit × 1-channel mode switching function)

• 16-bit PWC

• 2 channels (Capable of compare the inputs)

• 16-bit reload timer

• 1 channel

• 16-bit I/O timer

• 2 channels input capture, 4 channels output compare, 1 channel free run timer

• On chip dual clock generator system

• Low-power consumption (standby) mode

• With stop mode, sleep mode, CPU intermittent operation mode, watch timer mode, timebase timer mode

• Packages

• LQFP 64

• Process

• CMOS technology

• Power supply voltage

3 V, single source (some ports can be operated by 5 V power supply.)