MB90352TEPMC1中文资料富士通数据手册PDF规格书

■ DESCRIPTION

The MB90350E series, loaded 1 channel FULL-CAN* interface and Flash ROM, is general-purpose FUJITSU MICROELECTRONICS 16-bit microcontroller designing for automotive and industrial applications. Its main feature is the on-board CAN interface, which conforms to CAN standard Version2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach.

■ FEATURES

• Clock

• Built-in PLL clock frequency multiplication circuit

• Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz).

• Operation by sub clock (up to 50 kHz : 100 kHz oscillation clock divided by two) is allowed (devices without S-suffix only) .

• Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multiplied PLL clock).

• Built-in clock modulation circuit

• 16 Mbytes CPU memory space

24-bit internal addressing

• Instruction system best suited to controller

• Wide choice of data types (bit, byte, word, and long word)

• Wide choice of addressing modes (23 types)

• Enhanced multiply-divide instructions with sign and RETI instructions

• Clock supervisor (MB90x356x and MB90x357x only)

Main clock or sub clock is monitored independently.

• Enhanced high-precision computing with 32-bit accumulator

• Instruction system compatible with high-level language (C language) and multitask

• Employing system stack pointer

• Enhanced various pointer indirect instructions

• Barrel shift instructions

• Increased processing speed

4-byte instruction queue

• Powerful interrupt function

• Powerful 8-level, 34-condition interrupt feature

• Up to 8 channels external interrupts are supported.

• Automatic data transfer function independent of CPU

• Extended intelligent I/O service function (EI2OS) : up to 16 channels

• DMA : up to 16 channels

• Low power consumption (standby) mode

• Sleep mode (a mode that stops CPU operating clock)

• Main timer mode (a timebase timer mode switched from the main clock mode)

• PLL timer mode (a timebase timer mode switched from the PLL clock mode)

• Watch mode (a mode that operates sub clock and watch timer only)

• Stop mode (a mode that stops oscillation clock and sub clock)

• CPU intermittent operation mode

• Process

CMOS technology

• I/O port

• General-purpose input/output port (CMOS output)

- 49 ports (devices without S-suffix : devices that correspond to sub clock)

- 51 ports (devices with S-suffix : devices that do not correspond to sub clock)

(Continued)