MB89PV490中文资料富士通数据手册PDF规格书

■ DESCRIPTION

The MB89490 series has been developed as a general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit single-chip microcontrollers.

■ FEATURES

• Package used

QFP package for MB89F499, MB89497,MB89498

MQFP package for MB89PV490

• High speed operating capability at low voltage

• Minimum execution time: 0.32 µs/12.5MHz

• F2MC-8L family CPU core

Instruction set optimized for controllers

Multiplication and division instructions

16-bit arithmetic operations

Test and branch instructions

Bit manipulation instructions, etc.

• Clock

Embedded PLL clock multiplication circuit for sub-clock

Operating clock (PLL for sub-clock) can be selected four times of the sub-clock oscillation

• Six timers

PWM timer x 2

8/16-bit timer/counter x 2

21-bit timebase timer

Watch prescaler

• External interrupt

Edge detection (selectable edge) : 8 channels

Low level interrupt (wake-up function) : 8 channels

• 10-bit A/D converter (8 channels)

10-bit successive approximation type

• UART/SIO

Synchronous/asynchronous data transfer capability

• SIO

Synchronous data transfer capability

• LCD controller/driver

Max. 32 segments output x 4 commons

• I2C interface circuit

• Remote receiver circuit

• Low-power consumption mode

Stop mode (oscillation stops so as to minimize the current consumption.)

Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)

Watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an extremely low level.)

Sub-clock mode

• Watchdog timer reset

• I/O ports: max. 66channels