MB89965中文资料富士通数据手册PDF规格书

DESCRIPTION

The MB89960 series is a single-chip microcontroller that utilizes the F2MC-8L core for low voltage and high speed performance. The microcontroller contains a range of peripheral functions including timers, a serial interface, I2C interface, A/D converter, and external interrupts. The internal I2C interface complies with the SM bus standard and supports an SM bus battery controller.

FEATURES

• Range of package options

• QFP and MQFP packages (0.8 mm pitch)

• LQFP package (0.5 mm and 0.65 mm pitch)

• High speed operation at low voltage

Minimum instruction execution time = 0.4 µs (for a 10 MHz oscillation)

• F2MC-8L CPU core

Instruction set optimized for controller applications

• Multiplication and division instructions

• 16-bit arithmetic operations

• Bit test branch instructions

• Bit manipulation instructions, etc.

• Dual-clock control system

• Main clock : 10 MHz max.

(Four speed settings available, oscillation halts in sub-clock mode)

• Sub-clock : 32.768 kHz (Operation clock for sub-clock mode)

• Four channels

• 8/16-bit timer/counter (8-bit × 2 channels or 16-bit × 1 channel)

• 21-bit timebase timer

• Clock prescaler (15-bit)

• Serial I/O

Selectable transfer format (MSB-first or LSB-first) supports communications with a wide range of devices.

• A/D converter

10-bit × 4 channelsMB89960 Series

• External interrupts

• External interrupt 1 (3 channels)

Three independent interrupt inputs can be used to recover from low-power consumption modes (with edge-detection function)

• External interrupt 2 (1 channel with 8 inputs)

Eight inputs can be used to recover from low-power consumption modes (with “L” level detection function)

• Low-power consumption modes (standby modes)

• Stop mode (As all oscillations halt in sub-clock mode, current consumption falls to almost zero.)

• Sleep mode (The CPU stops to reduce the current consumption to approximately 1/3 of normal.)

• Clock mode (All operation halts other than the clock prescaler resulting in very low power consumption.)

• I2C interface*

• Supports Intel SM bus and Philips I2C bus standards.

• Uses a two-wire data transfer protocol.

• Max. 35 I/O ports

• Output-only ports (N-ch open drain) : 6

• General-purpose I/O ports (CMOS) : 21

• Output-only ports (CMOS) : 8