MB89593BWPFV中文资料富士通数据手册PDF规格书

DESCRIPTION

The MB89590B/BW series is a line of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, these microcontrollers contain a variety of peripheral functions, such as PLL clock control, timers, a serial interface, a PWM timer, the USB hub function, and the USB function. The USB hub function, in particular, supports five ports (one of them is dedicated to an internal function) allowing them to interface with other USB devices. The microcontrollers also contain one USB function channel to support high speeds.

FEATURES

• Package type

64-pin LQFP package (0.5 mm pitch)

• High-speed operations at low voltage

Minimum execution time : 0.33 µs (Automatically generates a 12 MHz main clock and a 48 MHz USB interface synchronization clock with an externally supplied 6 MHz clock and the internal PLL circuit.)

• F2MC-8L CPU core

Instruction set that is optimum to the controllers

Multiplication and division instructions, 16-bit arithmetic operations, Branch instructions by bit testing, Bit manipulation instructions, etc.

• PLL clock control

The internal PLL clock circuit allows the use of low-speed clocks which are advantageous to noise characteristics.

(6 MHz externally supplied clock : Internal system clock oscillated at 12 MHz)

• Various timers

8-bit PWM timer (can be used as either 8-bit PWM timer × 2 channels or PPG timer × 1 channel)

Internal 21-bit timebase timer

• Internal USB transceiver circuit (Compatible with high and low speeds)

• USB hub

Compliant to USB Protocol Revision 1.0

Five downstream port channels (One of these channels is dedicated to a function.)

Automatically responds to all USB protocols by hardware.

Descriptor configuration information is provided as ROM data for automatic responding by hardware (vendor

ID and product ID) .

* String data is not supported.

Allows switching between BUS power supply and own power supply modes.

Power supply to the USB down ports is controlled port by port.

• USB function

Compliant to USB Protocol Revision 1.0

Support for full speed

Allows four endpoints to be specified at maximum.

Types of transfer supported : control/interrupt/bulk/isochronous

Built-in DMAC (Maps the buffer for each endpoint on to the internal RAM to directly access the memory for

function’s send and receive data.)

• UART/serial interface

Built-in UART/SIO function (selectable by switching)

• External interrupt

External interrupt (level detection × 8 channels)

Eight inputs are independent of one another and can also be used for resetting from low-power consumption mode (the L-level detection feature available) .

• Low power consumption (standby mode supported)

Stop mode (There is almost no current consumption since oscillation stops.)

Sleep mode (This mode stops the running CPU.)

• A maximum of 45 general-purpose I/O ports

General-purpose I/O ports (CMOS) : 34

General-purpose output ports (CMOS) : 8

General-purpose I/O ports (Nch open drain) : 3

• Power supply

Supply voltage : 3.0 to 5.5 V