MAX9321B集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

General Description

The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage.

The MAX9321B features ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL and LVPECL signals, these devices operate over a +3.0V to +5.5V supply range, allowing high-performance clock and data distribution in systems with a nominal 3.3V or 5.0V supply. For differential ECL and LVECL operation, this device operates from a -3.0V to -5.5V supply.

The MAX9321B is offered in industry-standard 8-pin SO and TSSOP packages.

特性 Features

♦ Improved Second Source of the MC10EP16D

♦ +3.0V to +5.5V Differential PECL/LVPECL Operation

♦ -3.0V to -5.5V Differential ECL/LVECL Operation

♦ Low 17mA Supply Current

♦ 20ps Part-to-Part Skew

♦ 172ps Propagation Delay

♦ Minimum 300mV Output at 3GHz

♦ Output Low for Open Input

♦ ESD Protection >2kV (Human Body Model)

♦ On-Chip Reference for Single-Ended Input

Applications

  Precision Clock Buffer

  Low-Jitter Data Repeater