Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers

General Description The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output l

文件：187.44 Kbytes 页数：15 Pages

MAXIM

美信

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：托盘 功能：解串器 类别：集成电路（IC） 串行器，解串器 描述：IC DESERIALIZER 21BIT 48TSSOP

AD

亚德诺

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR） 功能：解串器 类别：集成电路（IC） 串行器，解串器 描述：IC DESERIALIZER 21BIT 48TSSOP

AD

亚德诺

Sound and Vibration Data Acquisition

文件：544.02 Kbytes 页数：6 Pages

NI

恩艾

System Reset

Outline This IC is a reset IC with a delay circuit which realizes high-precision detection accuracy and is provided in an ultra-small package. Features 1. Internal delay circuit Delay time can be set with an external capacitor. 2. High-precision detection accuracy Vs±1.

文件：135.4 Kbytes 页数：6 Pages

MITSUMI

三美

IC for System Reset Monolithic IC

Outline This IC is a reset IC with a delay circuit which realizes high-precision detection accuracy and is provided in an ultra-small package. Features 1. Internal delay circuit Delay time can be set with an external capacitor. 2. High-precision detection accuracy Vs±1.

文件：66.32 Kbytes 页数：6 Pages

MITSUMI

三美