MAX5839A中文资料八通道、13位、电压输出DAC，并行接口数据手册ADI规格书

描述 Description

The MAX5839 contains eight 13-bit, voltage-output digital-to-analog converters (DACs). On-chip precision output amplifiers provide the voltage outputs. The device operates from +14V/-9V supplies. Its bipolar output voltage swing ranges from +9V to -4V and is achieved with no external components. The MAX5839 has three pairs of differential reference inputs; two of these pairs are connected to two DACs each, and a third pair is connected to four DACs. The references are independently controlled, providing different full-scale output voltages to the respective DACs. The MAX5839 operates within the following voltage ranges: VDD = +7V to +14V, VSS = -5V to -9V, and VCC = +4.75V to +5.25V.
The MAX5839 features double-buffered interface logic with a 13-bit parallel data bus. Each DAC has an input latch and a DAC latch. Data in the DAC latch sets the output voltage. The eight input latches are addressed with three address lines. Data is loaded to the input latch with a single write instruction. An asynchronous load input (active-low LD) transfers data from the input latch to the DAC latch. The active-low LD input controls all DACs; therefore, all DACs can be updated simultaneously by asserting the active-low LD pin. An asynchronous active-low CLR input sets the output of all eight DACs to the respective DUTGND input of the op amp. Note that active-low CLR is a CMOS input, which is powered by VDD. All other logic inputs are TTL/CMOS compatible. The \"A\" grade of the MAX5839 has a maximum INL of ±2 LSBs, while the \"B\" grade has a maximum INL of ±4 LSBs. Both grades are available in 44-pin MQFP packages.

特性 Features

• Full 13-Bit Performance Without Adjustments
• 8 DACs in a Single Package
• Buffered Voltage Outputs
• Unipolar or Bipolar Voltage Swing to +9V and -4V
• 22µs Output Settling Time
• Drives up to 10,000pF Capacitive Load
• Low Output Glitch: 30mV
• Low Power Consumption: 10mA (typ)
• Small Package: 44-Pin MQFP
• Double-Buffered Digital Inputs
• Asynchronous Load Updates All DACs Simultaneously
• Asynchronous active-low CLR Forces All DACs to DUTGND Potential

应用 Application

• 任意函数发生器
• 自动测试设备(ATE)
• 航空电子与军用系统
• 数字增益与失调控制
• 工业过程控制
• 元件数最少的模拟系统
• SONET应用