MAX3881集成电路（IC）的串行器解串器规格书PDF中文资料

General Description

The MAX3881 deserializer with clock recovery is ideal for converting 2.488Gbps serial data to 16-bit-wide, 155Mbps parallel data for SDH/SONET applications. Operating from a single +3.3V supply, this device accepts high-speed serial-data inputs and delivers single-ended PECL parallel data outputs and a differential PECL parallel clock output for interfacing with digital circuitry.

The MAX3881 includes a low-power clock recovery and data retiming function for 2.488Gbps applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input; the signal is then retimed by the recovered clock. The MAX3881’s jitter performance exceeds all SDH/SONET specifications. An additional 2.488Gbps serial input is available for system loopback diagnostic testing. The device also includes a TTL-compatible loss-of-lock (LOL) monitor.

The MAX3881 is available in the extended temperature range (-40°C to +85°C) in a 64-pin TQFP-EP package.

特性 Features

♦ Single +3.3V Supply

♦ 530mW Operating Power

♦ Fully Integrated Clock Recovery and Data Retiming

♦ Exceeds ANSI, ITU, and Bellcore Specifications

♦ Additional High-Speed Input Facilitates System

   Loopback Diagnostic Testing

♦ 2.488Gbps Serial to 155Mbps Parallel Conversion

♦ Differential PECL Clock Output

♦ Single-Ended PECL Data Outputs

♦ Tolerates >2000 Consecutive Identical Digits

♦ Loss-of-Lock Indicator

Applications

   2.488Gbps SDH/SONET Transmission Systems

   Add/Drop Multiplexers

   Digital Cross-Connects