MAX3681集成电路（IC）的串行器解串器规格书PDF中文资料

General Description

The MAX3681 deserializer is ideal for converting 622Mbps serial data to 4-bit-wide, 155Mbps parallel data in ATM and SDH/SONET applications. Operating from a single +3.3V supply, this device accepts PECL serial clock and data inputs, and delivers low-voltage differential-signal (LVDS) clock and data outputs for interfacing with high-speed digital circuitry. It also provides an LVDS synchronization input that enables data realignment and reframing.

特性 Features

♦ Single +3.3V Supply

♦ 622Mbps Serial to 155Mbps Parallel Conversion

♦ 265mW Power

♦ LVDS Data Outputs and Synchronization Inputs

♦ Synchronization Input for Data Realignment and

Reframing

♦ Differential 3.3V PECL Clock and Data Inputs

Applications

622Mbps SDH/SONET Transmission Systems

622Mbps ATM/SONET Access Nodes

Add/Drop Multiplexers

Digital Cross Connects