MAX3672E/D中文资料美信数据手册PDF规格书

General Description

The MAX3672 is a low-jitter 155MHz/622MHz reference clock generator IC designed for system clock distribution and frequency synchronization in OC-48 and OC-192 SONET/SDH and WDM transmission systems. The MAX3672 integrates a phase/frequency detector, an operational amplifier (op amp), prescaler dividers, and input/output buffers. Using an external VCO, the MAX3672 can be configured easily as a phase-lock loop with bandwidth programmable from 30Hz to 10kHz.

特性 Features

♦ Single +3.3V or +5.0V Supply

♦ Power Dissipation: 150mW at +3.3V Supply

♦ External VCO Center Frequencies (fVCO): 155MHz to 700MHz

♦ Reference Clock Frequencies: fVCO, fVCO/2, fVCO/4, fVCO/8, fVCO/32

♦ Main Clock Output Frequency: fVCO

♦ Optional Output Clock Frequencies: fVCO, fVCO/2, fVCO/4, fVCO/8

♦ Low Intrinsic Jitter: <0.4psRMS

♦ Loss-of-Lock Indicator

♦ PECL Clock Output Interface

Applications

OC-12 to OC-192 SONET/WDM Transport Systems

Clock Jitter Clean-Up and Frequency Synchronization

Frequency Conversion

System Clock Distribution