MADP-030025-1314中文资料Surmount PIN Diode数据手册MACOM规格书

描述 Description

This device is a silicon, glass PIN diode surmount chip fabricated with MACOM’s patented HMIC™ process. This device features two silicon pedestals embedded in a low loss, low dispersion glass. The diode is formed on the top of one pedestal and connections to the backside of the device are facilitated by making the pedestal sidewalls electrically conductive. Selective backside metallization is applied producing a surface mount device. This vertical topology provides for exceptional heat transfer. The topside is fully encapsulated with silicon nitride and has an additional polymer layer for scratch and impact protection. These protective coatings prevent damage to the junction and the anode air-bridge during handling and assembly. These packageless devices are suitable for usage in moderate incident power, = 50dBm/C.W. or where the peak power is = 75dBm, pulse width is = 1µS, and duty cycle is = 0.01%. Their low parasitic inductance, 0.4 nH, and excellent RC constant, make these devices a superior choice for higher frequency switch elements when compared to their plastic package counterparts.

特性 Features

·0603 Outline
·High Average and Peak Power Handling
·Low Parasitic Capacitance and Inductance ?
·Polymer Scratch Protection
·Silicon Nitride Passivation
·No Wirebonds Required
·25µm I-Region Length Devices
·Surface Mount

应用 Application

·Aerospace and Defense
·ISM