MACH120-15JC中文资料莱迪思数据手册PDF规格书

GENERAL DESCRIPTION

The MACH120 is a member of the high-performance EE CMOS MACH® 1 family. This device has approximately five times the logic macrocell capability of the popular PALCE22V10 without loss of speed. The MACH120 consists of four PAL® blocks interconnected by a programmable switch matrix. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently.

DISTINCTIVE CHARACTERISTICS

◆68 Pins in PLCC

◆48 Macrocells

◆12 ns tPD Commercial, 18 ns tPD Industrial

◆77 MHz fCNT Commercial

◆48 I/Os; 4 dedicated inputs; 4 dedicated inputs/clocks

◆48 Outputs

◆48 Flip-flops; 4 clock choices

◆4 “PALCE26V12” blocks

◆SpeedLocking™ for guaranteed fixed timing

◆Pin-compatible with the MACH221