M74VHC1G125数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

The MC74VHC1G125 is an advanced high speed CMOS noninverting 3-state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffered 3-state output which provides high noise immunity and stable output. The MC74VHC1G125 input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the MC74VHC1G125 to be used to interface 5V circuits to 3V circuits.

特性 Features

• High Speed: tPD = 3.5ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 58; Equivalent Gates = 15
• Pb-Free Packages are Available

简介

M74VHC1G125属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的M74VHC1G125缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。