M74HC595_V01中文资料意法半导体数据手册PDF规格书

描述 Description

The M74HC595 device is a high speed CMOS

8-bit shift register with output latches (3-state)

fabricated with silicon gate C2MOS technology.

This device contains an 8-bit serial in, parallel out

shift register that feeds an 8-bit D-type storage

register. The storage register has 8 3-state

outputs. Separate clocks are provided for both the

shift register and the storage register.

The shift register has direct overriding clear, serial

input, and serial output (standard) pins for

cascading. Both the shift register and storage

register use positive edge triggered clocks. If both

clocks are connected together, the shift register

state will always be one clock pulse ahead of the

storage register.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

特性 Features

• High speed: fMAX = 59 MHz (typ.) at VCC = 6 V

• Low power dissipation: ICC = 4 μA (max.)

at TA= 25 °C

• High noise immunity:

VNIH = VNIL = 28 VCC (min.)

• Symmetrical output impedance:

– |IOH| = IOL = 6 mA (min.) for QA to QH

– |IOH| = IOL = 4 mA (min.) for QH’

• Balanced propagation delays: tPLH ≅ tPHL

• Wide operating voltage range:

VCC (opr.) = 2 V to 6 V

• Pin and function compatible with 74 series 595

• ESD performance

– HBM: 2 kV

– MM: 200 V

– CDM: 1 kV

Applications

• Automotive

• Industrial

• Computer

• Consumer