M672061F数据手册Microchip中文资料规格书

描述 Description

Active Errata List
• Limitation to the operating conditions inside a timing and data marginal configuration
• Reading Errors
• Empty Flag Parasitic PulseErrata Description
1. Limitation to the operating conditionsinside a timing and data marginal configuration.
Rising edge of READ from 0 ns up to 8 ns (typical) before the falling edge of WRITE when only one data is left to read.
See Figure 1 for behavior description.

Failure Mode:
Empty flag glitch and following data shift out 2nd byte corruption occurs when the rising edge of the first \"READ\" for data shift out occurs before falling edge of the third \"WRITE\" for data shift in.

Worst Case Range:
between 0 ns and 11 ns
Temperature = 125°C
Voltage = 4.5V
Characterization:
-55°C / 5.5V: 6 ns
25°C / 5V: 8 ns
125°C / 4.5V: 11 ns

Workaround
These FIFOs are functional outside of the above timing and data marginal configuration.
The recommended action is to avoid this particular configuration.
Please contact Atmel for a case by case application conditions analysis.2. Reading errors.
Description
Sometimes a bit that has been written \"1\" is read \"0\".
Failure Conditions
1. Read and write commands fall down almost at the same time, tWLRLparameter in the hereunder table.
2. Write bit “0” on input port while a bit “1” is expected on output port.
3. Reading the 64th+1 (mod 64) location (16th+1 (mod 16) for 4Kx9 FIFO) vs. the writing location.
4. Read pulse (tRLRH) less than the one specified in the hereunder table.