5120 x 8-BIT LINE MEMORY (FIFO)

DESCRIPTION The M66256FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffe

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Mitsubishi

三菱电机

5120 횞 8-Bit Line Memory (FIFO)

Description The M66256FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffe

文件：170.55 Kbytes 页数：14 Pages

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瑞萨

5120 × 8-Bit Line Memory (FIFO)

Renesas

瑞萨

APPLICATION RANGE

文件：342.15 Kbytes 页数：1 Pages

TEC

泰科电子