M5M5V416BRT中文资料4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM数据手册MinebeaMitsumi规格书

描述 Description

DESCRIPTION
The M5M5V416B is a f amily of low v oltage 4-Mbit static RAMs organized as 262,144-words by 16-bit, f abricated by Mitsubishi's high-perf ormance 0.25µm CMOS technology.
The M5M5V416B is suitable f or memory applications where a simple interf acing , battery operating and battery backup are the important design objectives.
M5M5V416BTP,RT are packaged in a 44-pin 400mil thin small outline package. M5M5V416BTP (normal lead bend ty pe package) , M5M5V416BRT (rev erse lead bend ty pe package) , both ty pesare v ery easy to design a printed circuit board.
From the point of operating temperature, the f amily is div ided into three v ersions; \"Standard\", \"W-v ersion\", and \"I-v ersion\". Those are summarized in the part name table below.FEATURES
• Single +2.7~+3.6V power supply
• Small stand-by current: 0.3µA(3V,ty p.)
• No clocks, No ref resh
• Data retention supply v oltage=2.0V to 3.6V
• All inputs and outputs are TTL compatible.
• Easy memory expansion by S1, S2, BC1 and BC2
• Common Data I/O
• Three-state outputs: OR-tie capability
• OE prev ents data contention in the I/O bus
• Process technology: 0.25µm CMOS
• Package: 44 pin 400mil TSOP (II)

特性 Features

• Single +2.7~+3.6V power supply
• Small stand-by current: 0.3µA(3V,ty p.)
• No clocks, No ref resh
• Data retention supply v oltage=2.0V to 3.6V
• All inputs and outputs are TTL compatible.
• Easy memory expansion by S1, S2, BC1 and BC2
• Common Data I/O
• Three-state outputs: OR-tie capability
• OE prev ents data contention in the I/O bus
• Process technology: 0.25µm CMOS
• Package: 44 pin 400mil TSOP (II)