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M54HCT541F1R中文资料意法半导体数据手册PDF规格书

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厂商型号

M54HCT541F1R

功能描述

OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT540: INVERTED - HCT541 NON INVERTED

文件大小

266.07 Kbytes

页面数量

12

生产厂商

STMICROELECTRONICS

中文名称

意法半导体

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-10-12 15:01:00

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M54HCT541F1R规格书详情

DESCRIPTION

The M54/74HCT540 and HCT541 are high speed CMOS OCTAL BUS BUFFERS (3-STATE) fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. The HCT540 is an inverting buffer and HCT541 is a non inverting buffer.

The 3 STATE control gate operates as a two input AND such that if either G1 and G2 are high, all eight outputs are in the high impedance state. In order to enhance PC board layout, the HCT540 and HCT541 offers a pinout having inputs and outputs on opposite sides of the package. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption.

■ HIGH SPEED tPD = 10 ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C

■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX.)

■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS540/541

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