M54HCT10中文资料意法半导体数据手册PDF规格书

DESCRIPTION

The M54/74HCT10 is a high speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption.

■ HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C

■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX)

■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS10