M54HC75F1R中文资料意法半导体数据手册PDF规格书

DESCRIPTION

The M54/74HC75 is a high speed CMOS 4-BIT D-TYPE LATCH fabricated in silicon gate C2MOS technology.

■ HIGH SPEED

tPD = 10 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION

ICC = 2 µA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY

VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE

|IOH| = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS

tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE

VCC = (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH

54/74LS75