M54HC595F1R中文资料意法半导体数据手册PDF规格书

DESCRIPTION

The M54/74HC595 is a high speed CMOS 8-BIT SHIFT REGISTERS/OUTPUT LATCHES (3-STATE) fabricated in silicon C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has 8 3-STATE outputs. Separate clocks are provided for both the shift register and the storage register.

■ HIGH SPEED

fMAX = 55 MHz (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION

ICC = 4 µA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY

VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS FOR QA TO QH

10 LSTTL LOADS FOR QH’

■ SYMMETRICAL OUTPUT IMPEDANCE

|IOH| = IOL = 6 mA (MIN.) FOR QA TO QH

|IOH| = IOL = 4 mA (MIN.) FOR QH’

■ BALANCED PROPAGATION DELAYS

tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE

WITH LSTTL 54/74LS595