M54HC4075F1R中文资料意法半导体数据手册PDF规格书

DESCRIPTION

The M54HC4075 is an high speed CMOS TRIPLE 3-INPUT OR GATE fabricated with silicon gate C2MOS technology.

The internal circuit is composed of 4 stages including buffer output, which enables high noise immunity and stable output.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

■ HIGH SPEED: tPD = 9 ns (TYP.) at VCC = 6V

■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V

■ PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 4075

■ SPACE GRADE-1: ESA SCC QUALIFIED

■ 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST

■ NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION

■ DEVICE FULLY COMPLIANT WITH SCC-9201-129