M41T56C64MY6F集成电路（IC）的实时时钟规格书PDF中文资料

M41T56C64MY6F属于集成电路（IC）的实时时钟。由意法半导体集团制造生产的M41T56C64MY6F实时时钟实时时钟 (RTC) 为几乎所有需要保持精确时间的电子设备提供时间和/或日期信息。时钟类型有二进制计数器、时钟/日历/监控器、历时计时器、幻时钟芯片、便携式系统控制器、温度记录器、时间事件记录器和计时器时钟外设。其包含 2 B 至 2 MB 不等的存储器，接口选项有 I2C、并行、串行、SPI、1 线式、2 线式、3 线式和 4 线式。

Summary description

The M41T56C64 is a low power, Serial Real Time Clock with 56 bytes of NVRAM plus a 64Kb EEPROM (see Figure 3). A built-in 32,768Hz oscillator (crystal controlled) and the first 8 bytes of the RAM are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and data are transferred serially via a two-line, bidirectional bus. The built-in address register is incremented automatically after each WRITE or READ data byte.

The M41T56C64 clock has a built-in power sense circuit which detects power failures and automatically switches to the battery supply during power failures. The energy needed to sustain the RAM and clock operations can be supplied from a small lithium coin cell.

Typical data retention time for the Serial RTC is in excess of 10 years with a 50mAh, 3V lithium cell. The M41T56C64 is supplied in an 18-lead Plastic SOIC package.

Feature summary

■ 5V ±10 supply voltage

■ I2C bus compatible

■ Operating temperature of –40 to 85°C

■ Packaging includes:

– 18-lead SOIC (with embedded crystal)

■ RoHS compliant

Serial RTC features

■ Counters for seconds, minutes, hours, day, date, month, years, and century

■ Embedded crystal package

■ Software clock calibration

■ Automatic power-fail detect and switch circuitry

■ 56 bytes of general purpose SRAM

■ Ultra-low battery supply current of 450nA

■ Automatic leap year compensation

■ Special software programmable output

■ Two-wire I2C serial interface supports 100kHz protocol

Serial EEPROM features

■ 8192 bytes of general purpose EEPROM (more than 1e6 erase/write cycles)

■ Two-wire I2C serial interface supports 400kHz protocol

■ Byte and page write (up to 32 bytes)

■ More than 40 year data retention

■ Self-timed programming cycle