M3488Q1中文资料意法半导体数据手册PDF规格书

GENERAL DESCRIPTION

The M3488 is intended for large telephone switching systems, mainly central exchanges,digital line concentrators and private branch exchanges where a distributed microcomputer control approach is extensively used. It consists of a speech memory (SM), a control memory (CM), a serial/parallel and a parallel/serial converter, an internal parallel bus, an interface (8 data lines, 11 control signals) and dedicated control logic.

■ 256 INPUT AND 256 OUTPUT CHANNEL CMOS DIGITAL SWITCHING MATRIX COMPATIBLE WITH M088

■ BUILDING BLOCK DESIGNED FOR LARGE CAPACITY ELECTRONIC EXCHANGES, SUBSYSTEMS AND PABX

■ NO EXTRA PIN NEEDED FOR NOT-BLOCKING SINGLE STAGE AND HIGHER CAPACITY SYNTHESIS BLOCKS (512 or 1024 channels)

■ EUROPEAN TELEPHONE STANDARD COMPATIBLE (32 serial channels per frame)

■ PCM INPUTS AND OUTPUTS MUTUALLY COMPATIBLE

■ ACTUAL INPUT-OUTPUT CHANNEL CONNECTIONS STORED AND MODIFIED VIA AN ON CHIP 8-BIT PARALLEL MICROPROCESSOR INTERFACE

■ TYPICAL BIT RATE : 2Mbit/s

■ TYPICAL SYNCHRONIZATION RATE : 8KHz (time frame is 125µs)

■ 5V P0WER SUPPLY

■ CMOS & TTL INPUT/OUTPUT LEVELS COMPATIBLE

■ HIGH DENSITY ADVANCED 1.2µm HCMOS3 PROCESS

Main instructions controlled by the microprocessor interface

■ CHANNEL CONNECTION/DISCONNECTION

■ OUTPUT CHANNEL DISCONNECTION

■ INSERTION OF A BYTE ON A PCM OUTPUT CHANNEL/DISCONNECTION

■ TRANSFER TO THE MICROPROCESSOR OF A SINGLE PCM OUTPUT CHANNEL SAMPLE

■ TRANSFER TO THE MICROPROCESSOR OF A SINGLE OUTPUT CHANNEL CONTROL WORD

■ TRANSFER TO THE MICROPROCESSOR OF A SELECTED 0 CHANNEL PCM INPUT DATA