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M2V28S40TP-7中文资料PDF规格书
M2V28S40TP-7规格书详情
DESCRIPTION
M2V28S20TP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and M2V28S30TP is organized as 4-bank x 4,194,304-word x 8-bit and M2V28S40TP is organized as 4-bank x 2,097,152-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK.
M2V28S20TP,M2V28S30TP,M2V28S40TP achieves very high speed data rates up to 133MHz, and is suitable for main memory or graphic memory in computer systems.
FEATURES
- Single 3.3V ±0.3V power supply
- Max. Clock frequency -6:PC133 / -7:PC100 / -8:PC100
- PC133(-6) supports x4/x8 only. And does not support Low-Power (L) version.
- Fully synchronous operation referenced to clock rising edge
- 4-bank operation controlled by BA0,BA1(Bank Address)
- /CAS latency- 2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Burst type- Sequential and interleave burst (programmable)
- Byte Control- DQML and DQMU (M2V28S40TP)
- Random column access
- Auto precharge / All bank precharge controlled by A10
- Auto and self refresh
- 4096 refresh cycles /64ms
- LVTTL Interface
- Package
M2V28S20TP/30TP/40TP
400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch
产品属性
- 型号:
M2V28S40TP-7
- 制造商:
MITSUBISHI
- 制造商全称:
Mitsubishi Electric Semiconductor
- 功能描述:
128M Synchronous DRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
MITSUBISHI |
05+ |
原厂原装 |
4334 |
只做全新原装真实现货供应 |
询价 | ||
MIT |
2001 |
BGA |
6000 |
绝对原装自己现货 |
询价 | ||
MITSUBISHI |
23+ |
BGAQFP |
8659 |
原装公司现货!原装正品价格优势. |
询价 | ||
Mitsubishi |
01+ |
BGA |
70 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
MITSUBISHI/三菱 |
23+ |
NA/ |
70 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
询价 | ||
MIT |
22+23+ |
BGA |
7531 |
绝对原装正品全新进口深圳现货 |
询价 | ||
MIT |
TSOP |
68500 |
一级代理 原装正品假一罚十价格优势长期供货 |
询价 | |||
Mitsubishi |
BGA |
68900 |
原包原标签100%进口原装常备现货! |
询价 | |||
MITSUBIS |
22+ |
BGA |
3000 |
原装正品,支持实单 |
询价 | ||
MIT |
22+ |
BGA |
3000 |
原装现货库存.价格优势 |
询价 |