M2V28S30ATP-7L数据手册批发供应三菱电机-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
M2V28S30ATP-7L	文件：743.24 Kbytes Page：51 Pages	128M Synchronous DRAM DESCRIPTION M2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and M2V28S30ATP is organized as 4-bank x 4,194,304-word x 8-bit and M2V28S40ATP is organized as 4-bank x 2,097,152-word x 16-bit. All inputs and outputs are referenced to the rising edge 文件：743.24 Kbytes 页数：51 Pages	Mitsubishi 三菱电机	Mitsubishi
P2V28S30ATP-7	文件：652.38 Kbytes Page：51 Pages	128Mb SDRAM Specification DESCRIPTION P2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and P2V28S30ATP is organized as 4-bank x 4,194,304-word x 8-bit and P2V28S40ATP is organized as 4-bank x 2,097, 152-word x 16-bit. All inputs and outputs are referenced to the rising edge 文件：652.38 Kbytes 页数：51 Pages	VML 世界先进	VML
M2V28S30ATP-7	文件：743.24 Kbytes Page：51 Pages	128M Synchronous DRAM DESCRIPTION M2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL interface and M2V28S30ATP is organized as 4-bank x 4,194,304-word x 8-bit and M2V28S40ATP is organized as 4-bank x 2,097,152-word x 16-bit. All inputs and outputs are referenced to the rising edge 文件：743.24 Kbytes 页数：51 Pages	Mitsubishi 三菱电机	Mitsubishi

更多M2V28S30ATP-7L供应商更新时间2025-12-19 11:00:00