LX5255CPW中文资料Legacy Power Management数据手册Microchip规格书

描述 Description

Key Features: Compliant with SPI-2 (Ultra2), SPI-3 (Ultra160), and SPI-4 (Ultra320) 2.5pF Maximum Disabled Output Capacitance Fast Response, No External Capacitors Required 5µA Supply Current in Disconnect Mode 30mA Supply During Normal Operation Logic Command Disconnects All Termination Lines DIFSENS Line Driver Current Limit and Thermal Protection Pin Compatible With Unitrode UCC5640 Description: The LX5255 is a Low Voltage Differential (LVD) terminator designed to comply with the LVD termination specification in the SPI-4 document. The LX5255 is specifically designed for LVD only applications. Because the LX5255 supports only LVD, it has lower output capacitance than multimode terminators such as the LX5250. The LX5255 utilizes an industry standard LVD architecture. The individual high bandwidth drivers maximize channel separation, reduce channel-to-channel noise and cross talk to insure Ultra320 performance. When the LX5255 is enabled, the Differential Sense (DIFSENS) pin supplies a voltage between 1.2V and 1.4V. In application, the terminator DIFFB input is connected to the system DIFSENS line. If there are no single ended or High Voltage Differential (HVD) devices attached to the system, the LVD output will be enabled. If the DIFSENS line is LOW, indicating a single ended device, the LX5255 output will be HiZ. If the DIFSENS line is HIGH, indicating a HVD device, the LX5255 output will be HiZ. The LX5255 has a TTL compatible sleep/disable mode. Applying a logic HIGH to the DISC pin puts the LX5255 in sleep mode. During sleep mode, power dissipation is reduced to a meager 5?A while also placing all outputs and the DIFSENS function in a HiZ state.  ROHS