MIPI to Dual-Port LVDS/TTL Converter

The Lontium LT9211 is a high performance convertor which interconvertible between MIPI DSI/CSI-2/Dual-Port LVDS and TTL except for TTL to TTL. The LT9211 deserializes input MIPI/LVDS/TTL video data, decodes packets, and converts the formatted video data stream to MIPI/LVDS/TTL transmitter output bet • Dual-Port LVDS Transimitter\n• MIPI Transmitter\n• TTL Output\n• Dual-Port LVDS Receiver\n• TTL Intput\n• Single-Port MIPI Receiver\n• Miscellaneous;

Lontium

龙迅股份

MIPI to 2-Port LVDS Converter

The Lontium LT9211D is a high performance MIPI DSI/CSI-2 to Dual-Port LVDS convertor. The LT9211D deserializes input MIPI video data, decodes packets, and converts the formatted video data stream to LVDS transmitter output between AP and mobile display panel or camera. The LT9211D support maximum 14 • Dual-Port LVDS Transimitter• MIPI Transmitter• Miscellaneous;

Lontium

龙迅股份

2-Port LVDS/MIPI/TTL to 2-Port LVDS/MIPI/TTL Converter with Frame Rate Conversion and Rotation

The Lontium LT9211R is a high performance convertor which interconvertible between MIPI DSI/CSI-2/Dual-Port LVDS and TTL except for LVDS to MIPI. The LT9211R deserializes input MIPI/LVDS/TTL video data, decodes packets, rotates video, changes frame rate and converts the formatted video data stream t • Dual-Port LVDS Receiver\n• Dual-Port LVDS Transmitter\n• MIPI Transmitter\n• TTL Output\n• Single-Port MIPI Receiver\n• DDR3 Controller\n• Miscellaneous;

Lontium

龙迅股份

Programmable DC-Balanced 21-Bit Serializers

General Description The MAX9209/MAX9213 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization. The MAX9209/MAX9213 feature programmable DC balance, which allows isolation between the serializ

文件：477.18 Kbytes 页数：20 Pages

Maxim

美信

Programmable DC-Balanced 21-Bit Serializers

文件：319.8 Kbytes 页数：20 Pages

Maxim

美信

Programmable DC-Balanced 21-Bit Serializers

General Description The MAX9209/MAX9213 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization. The MAX9209/MAX9213 feature programmable DC balance, which allows isolation between the serializ

文件：477.18 Kbytes 页数：20 Pages

Maxim

美信