LPC812M101JDH20中文资料恩XP数据手册PDF规格书

 System:

 ARM Cortex-M0+ processor, running at frequencies of up to 30 MHz with

single-cycle multiplier and fast single-cycle I/O port.

 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).

 System tick timer.

 Serial Wire Debug (SWD) and JTAG boundary scan modes supported.

 Micro Trace Buffer (MTB) supported.

 Memory:

 Up to 16 kB on-chip flash programming memory with 64 Byte page write and erase.

 Up to 4 kB SRAM.

 ROM API support:

 Boot loader.

 USART drivers.

 I2C drivers.

 Power profiles.

 Flash In-Application Programming (IAP) and In-System Programming (ISP).

 Digital peripherals:

 High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 18

General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,

programmable open-drain mode, input inverter, and glitch filter.

 High-current source output driver (20 mA) on four pins.

 High-current sink driver (20 mA) on two true open-drain pins.

 GPIO interrupt generation capability with boolean pattern-matching feature on eight

GPIO inputs.

 Switch matrix for flexible configuration of each I/O pin function.