LPC3230FET296

Arm926EJ-S^™ with 256 kB SRAM, USB High-speed OTG, SD/MMC, NAND flash controller, LCD controller; \n\n•ARM926EJS processor, running at CPU clock speeds up to 266 MHz\n\n•Vector Floating Point (VFP) coprocessor\n\n•32 kB instruction cache and a 32 kB data cache\n\n•Up to 256 kB of Internal SRAM (IRAM)\n\n•Selectable boot-up from various external devices\n\n•Multi-layer AHB system that provides a separate bus for each AHB master\n\n•External memory controller for DDR and SDR SDRAM as well as for static devices\n\n•Two NAND flash controllers\n\n•Master Interrupt Controller (MIC) and two Slave Interrupt Controllers (SIC)\n\n•Eight channel General Purpose DMA (GPDMA) controller on the AHB\n\n•USB interface supporting either device, host (OHCI compliant), or On-The-Go\n\n•Four standard UARTs with fractional baud rate generation\n\n•Three additional high-speed UARTs intended for on-board communications\n\n•Two SPI controllers\n\n•Two SSP controllers\n\n•Two I2C-bus interfaces with standard open-drain pins\n\n•Two I2S-bus interfaces, each with separate input and output channels\n\n•LCD controller supporting both STN and TFT panels\n\n•Secure Digital (SD) memory card interface\n\n•General Purpose (GP) input, output, and I/O pins\n\n•10 bit, 400 kHz Analog-to-Digital Converter (ADC)\n\n•Real-Time Clock (RTC) with separate power pin and dedicated 32 kHz oscillator\n\n•32-bit general purpose high-speed timer with a 16-bit pre-scaler\n\n•Six enhanced timer/counters\n\n•32-bit millisecond timer driven from the RTC clock\n\n•WatchDog timer clocked by the peripheral clock\n\n•Two single-output PWM blocks\n\n•Motor control PWM\n\n•Keyboard scanner function allows automatic scanning of an up to 8 x 8 key matrix\n\n•Up to 18 external interrupts\n\n•Standard ARM test/debug interface for compatibility with existing tools\n\n•Emulation Trace Buffer (ETB) with 2048 x 24 bit RAM allows trace via JTAG\n\n•Stop mode saves power\n\n•On-chip crystal oscillator\n\n•An on-chip PLL allows CPU operation up to the maximum CPU rate\n\n•Boundary scan for simplified board testing\n\n\n;

Overview Archived content is no longer updated and is made available for historical reference only.\n The LPC3230 operates at CPU frequencies of up to 266 MHz. The NXP® implementation uses an ARM926EJ-S CPU core with a Harvard architectur, 5-stage pipeline, and an integral Memory Management Unit (MMU).The LPC3230 also includes 256 kB of on-chip static RAM, a NAND flash interface, an LCD controller that supports STN and TFT panels, and an external bus interface that supports SDR and DDR SDRAM, as well as static devices. In addition, the LPC3230 includes a USB 2.0 full-speed interface, seven UARTs, two I2C-bus interfaces, two SPI/SSP ports, two I2S-bus interfaces, two single output PWMs, a motor control PWM, six general purpose timers with capture inputs and compare outputs, a Secure Digital (SD) interface, and a 10-bit Analog-to-Digital Converter (ADC) with a touch screen sense option.\n

恩XP

LPC3230FET296

16/32-bit ARM microcontrollers; hardware floating-point coprocessor, USB On-The-Go, and EMC memory interface

ETC