LPC1346FHN33

基于ARM® Cortex®-M3内核的入门级32位微控制器(MCU); Arm Cortex-M3 r2p1 processor, running at frequencies of up to 72 MHz\nArm Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).\nNon Maskable Interrupt (NMI) input selectable from several input sources\nSystem tick timer\n48 kB on-chip flash program memory with a 256 byte page erase function\nIn-System Programming (ISP) and In-Application Programming (IAP)\n4 kB on-chip EEPROM data memory with on-chip API support\n10 kB SRAM data memory\n16 kB boot ROM with API support\nStandard JTAG test interface for BSDL\nSerial Wire Debug\nSupport for ETM Arm Cortex-M3 debug time stamping\n26 General Purpose I/O (GPIO) pins\n8 GPIO pins can be selected as edge and level sensitive interrupt sources\nTwo GPIO grouped interrupt modules\nHigh-current source output driver (20 mA) on one pin (P0_7)\nHigh-current sink driver (20 mA) on true open-drain pins (P0_4 and P0_5)\nFour general purpose counter/timers\nProgrammable Windowed WatchDog Timer (WWDT)\nRepetitive Interrupt Timer (RI Timer)\n12-bit ADC with eight input channels and sampling rates of up to 500 kSamples/s\nUSB 2.0 full-speed device controller\nUSART with fractional baud rate generation\nTwo SSP controllers with FIFO and multi-protocol capabilities\nI2C-bus interface supporting the full I2C-bus specification and Fast-mode Plus\nCrystal Oscillator with an operating range of 1 MHz to 25 MHz\n12 MHz high-frequency Internal RC oscillator (IRC) trimmed to 1 % accuracy\nInternal low-power, low-frequency WatchDog Oscillator (WDO)\nPLL allows CPU operation up to the maximum CPU rate\nA second, dedicated PLL is provided for USB\nClock output function with divider\nFour reduced power modes\nPower profiles residing in boot ROM\nProcessor wake-up\nIntegrated PMU (Power Management Unit)\nPower-On Reset (POR)\nBrownout detect with four separate thresholds for interrupt and forced reset\nUnique device serial number for identification\nSingle 3.3 V power supply (2.0 V to 3.6 V)\n;

The LPC1346FHN33 is an Arm Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption. The Arm Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC1346FHN33 operates at CPU frequencies of up to 72 MHz. The Arm Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The Arm Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.\n