LP621024DV-55LLT中文资料联笙电子数据手册PDF规格书

General Description

The LP621024D-T is a low operating current 1,048,576- bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing.

Data retention is guaranteed at a power supply voltage as low as 2V.

特性 Features

■ Single +5V power supply

■ Access times: 55/70 ns (max.)

■ Current:

Very low power version: Operating: 70mA (max.)

Standby: 50mA (max.)

■ Full static operation, no clock or refreshing required

■ All inputs and outputs are directly TTL-compatible

■ Common I/O using three-state output

■ Output enable and two chip enable inputs for easy application

■ Data retention voltage: 2V (min.)

■ Available in 32-pin DIP, SOP TSOP and TSSOP (8 X 13.4mm) packages