LP5899QDRRRQ1中文资料德州仪器数据手册PDF规格书

1 Features

• AEC-Q100 qualified for automotive applications

– Grade 1: –40°C to 125°C ambient temperature

– Device HBM classification level H3A

– Device CDM classification level C5

• Operating voltage VCC range: 2.5V to 5.5V

• SPI peripheral

– Data transfer rate up to 20MHz

– Support multiple peripherals with one controller

• Continuous Clock Serial Interface (CCSI)

Controller and Peripheral

– Data transfer rate up to 20MHz

– Programmable clock jitter for EMI enhancement

• Diagnostics

– Open-drain FAULT pin

– SPI communication loss detection

– CRC for SPI communication

– CCSI data integrity

• Data ready interrupt for availability of data

2 Applications

• SPI compatible connectivity for LP5891-Q1 and

LP5892-Q1

3 Description

The LP5899-Q1 SPI-compatible connectivity enables

LP589x-Q1 device family to be controlled using

a standard SPI controller. The device features an

internal oscillator to generate the continuous clock

required by the LP589x-Q1 device family. Jitter can be

added to the continuous clock for EMI enhancement.

The transmitted data is aligned to the continuous

clock to maintain the timing requirements of the CCSI

interface.

LP5899-Q1 incorporates reporting of faults in both

the LP589x-Q1 daisy chain and LP5899-Q1 internal.

Data transmission of register and VSYNC commands

to the LP589x-Q1 daisy chain is CRC protected by

LP5899-Q1. In addition, the data line is guarded by

LP5899-Q1 for stuck-at faults.