LMK61PD0A2晶体振荡器谐振器的引脚可配置/可选择振荡器规格书PDF中文资料

LMK61PD0A2属于晶体振荡器谐振器的引脚可配置/可选择振荡器。由德州仪器制造生产的LMK61PD0A2引脚可配置/可选择振荡器引脚可配置/可选择振荡器产品族中的产品可用作时间或频率测量的基准，其中包含基准元件及其操作所需的支持组件。它们与其他类似振荡器产品的区别在于包含可选择输出功能，从而允许通过向器件上存在的一个或多个其他输入引脚施加逻辑信号，来更改器件产生的输出频率。

1 Features

1• Ultra-low Noise, High Performance

– Jitter: 90 fs RMS typical f OUT > 100 MHz

– PSRR: -70 dBc, robust supply noise immunity

• Flexible Output Frequency and Format; User

Selectable

– Frequencies: 62.5 MHz, 100 MHz, 106.25

MHz, 125 MHz, 156.25 MHz, 212.5 MHz,

312.5 MHz

– Formats: LVPECL, LVDS or HCSL

• Total frequency tolerance of ± 50 ppm

• Internal memory stores multiple start-up

configurations, selectable through pin control

• 3.3V operating voltage

• Industrial temperature range (-40ºC to +85ºC)

• 7 mm x 5 mm 8-pin package

2 Applications

• High-performance replacement for crystal-, SAW-,

or silicon-based Oscillators

• Switches, Routers, Network Line Cards, Base

Band Units (BBU), Servers, Storage/SAN

• Test and Measurement

• Medical Imaging

• FPGA, Processor Attach

3 Description

The LMK61PD0A2 is an ultra-low jitter PLLatinumTM

pin selectable oscillator that generates commonly

used reference clocks. The device is pre-

programmed in factory to support seven unique

reference clock frequencies that can be selected by

pin-strapping each of FS[1:0] to VDD, GND or NC (no

connect). Output format is selected between LVPECL, LVDS, or HCSL by pin-strapping OS to

VDD, GND or NC. Internal power conditioning provide

excellent power supply ripple rejection (PSRR),

reducing the cost and complexity of the power

delivery network. The device operates from a single

3.3 V ± 5% supply.