LMK1D1212中文资料12 通道输出 1.8V、2.5V 和 3.3V LVDS 缓冲器数据手册TI规格书

描述 Description

The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS.

The LMK1D121x is specifically designed for driving 50-Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin (see Figure 8-6).

The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static low). The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 1.8-V or 2.5-V or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature).

特性 Features

• High-performance LVDS clock buffer family: up to 2 GHz
• 2:16 differential buffer (LMK1D1216)
• Supply voltage: 1.71 V to 3.465 V
• Very low propagation delay:
• High-swing LVDS (boosted mode): 500-mV VOD typical when AMP_SEL = 1
• LVDS reference voltage, VAC_REF, available for capacitive-coupled inputs
• Packaged in
• LMK1D1216: 7-mm × 7-mm, 48-pin VQFN (RGZ)

简介

LMK1D1212属于集成电路（IC）的时钟缓冲器驱动器。由TI制造生产的LMK1D1212时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。