Precision Clock Conditioner with Dual PLLs and Integrated VCO

文件：1.7294 Mbytes 页数：47 Pages

TI

德州仪器

LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

文件：588.24 Kbytes 页数：46 Pages

TI

德州仪器

Clock Jitter Cleaner with Cascaded PLLs

文件：588.24 Kbytes 页数：46 Pages

TI

德州仪器

LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

1FEATURES 23• Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO • Outputs – LVPECL/2VPECL, L

文件：926.89 Kbytes 页数：56 Pages

TI

德州仪器