丝印：LK5C23208A；Package：VQFN；LMK5C23208A 2-DPLL 3-APLL 2-IN 8-OUT Network Synchronizer With JED204B/ JED204C and BAW VCO for Wireless Communications

1 Features • Ultra-low jitter BAW VCO based Wireless Infrastructure and Ethernet clocks – 40fs typical/ 57fs maximum RMS jitter at 491.52MHz – 50fs typical/ 62fs maximum RMS jitter at 245.76MHz • 2 high-performance Digital Phase Locked Loop (DPLL) with 3 Analog Phase Locked Loops (APLLs)

文件：4.86813 Mbytes 页数：107 Pages

TI

德州仪器

丝印：LK5C23208A；Package：VQFN；LMK5C23208A 2-DPLL 3-APLL 2-IN 8-OUT Network Synchronizer With JED204B/ JED204C and BAW VCO for Wireless Communications

1 Features • Ultra-low jitter BAW VCO based Wireless Infrastructure and Ethernet clocks – 40fs typical/ 57fs maximum RMS jitter at 491.52MHz – 50fs typical/ 62fs maximum RMS jitter at 245.76MHz • 2 high-performance Digital Phase Locked Loop (DPLL) with 3 Analog Phase Locked Loops (APLLs)

文件：4.86813 Mbytes 页数：107 Pages

TI

德州仪器