Quad SPST JFET Analog Switches

General Description These devices are a monolithic combination of bipolar and JFET technology producing the industry’s first one chip quad JFET switch. A unique circuit technique is employed to main tain a constant resistance over the analog voltage range of ±10V. The input is designed to opera

文件：416.3 Kbytes 页数：18 Pages

NSC

国半

Quad SPST JFET Analog Switches

General Description These devices are a monolithic combination of bipolar and JFET technology producing the industry’s first one chip quad JFET switch. A unique circuit technique is employed to main tain a constant resistance over the analog voltage range of ±10V. The input is designed to opera

文件：416.3 Kbytes 页数：18 Pages

NSC

国半

Quad SPST JFET Analog Switches

General Description These devices are a monolithic combination of bipolar and JFET technology producing the industry’s first one chip quad JFET switch. A unique circuit technique is employed to main tain a constant resistance over the analog voltage range of ±10V. The input is designed to opera

文件：416.3 Kbytes 页数：18 Pages

NSC

国半

VOLTAGE REGULATOR WITH ON/OFF SWITCH

DESCRIPTION The TK113xxB is a low dropout linear regulator with a builtin electronic switch. The device is in the ON state when the control pin is pulled to a low level. An external capacitor can be connected to the noise bypass pin to lower the output noise level to 30 µVrms. An internal PNP p

文件：152.26 Kbytes 页数：13 Pages

TOKO

VOLTAGE REGULATOR WITH ON/OFF SWITCH

DESCRIPTION The TK113xxB is a low dropout linear regulator with a built in electronic switch. The device is in the “on” state when the control pin is pulled to a low level. An external capacitor can be connected to the noise bypass pin to lower the output noise level to 30 µVrms. An internal PNP

文件：123.06 Kbytes 页数：16 Pages

TOKO

VOLTAGE REGULATOR WITH ON/OFF SWITCH

DESCRIPTION The TK113xxB is a low dropout linear regulator with a built in electronic switch. The device is in the “on” state when the control pin is pulled to a low level. An external capacitor can be connected to the noise bypass pin to lower the output noise level to 30 µVrms. An internal PNP

文件：123.06 Kbytes 页数：16 Pages

TOKO