LC89052T中文资料三洋数据手册PDF规格书

Overview

The LC89052T is an audio LSI that demodulates according to the data format for the data transferred between digital audio devices via the IEC 60958/61937 and EIAJ CP-1201. It supports sampling frequencies of up to 192kHz and output data lengths up to 28 bits. Despite it is compact and made in a low cost, the LC89052T includes a built-in oscillator and serial data input circuits and allows the system microcontroller to read the sub-code Q data and channel status. It supports low-power modes that allow low-voltage operation. It also supports a lower power mode, which is suitable for application that requires long battery life, such as cell phones, PDAs, and portable audio devices.

特性 Features

• Incorporates a built-in PLL circuit to synchronize with transferred bi-phase mark signal.

• Can receive input with sampling frequencies of 32kHz to 192kHz.

• Can set the upper limit of sampling frequency of received data.

• Can receive input data of specific sampling frequencies.

• Outputs the following clocks: fs, 64fs, 128fs, 256fs, 384fs, and 512fs.

• Contains a built-in oscillation amplifier that can construct a oscillation circuit. An external clock can be also provided.

• Outputs an externally input clock signal that can be used as the A/D converter clock when the PLL is unlocked.

• Maintains the continuity of the output clock when the clock is switched.

• Equipped with a serial digital audio data input pin that can be configured for a demodulated signal output.

• Can output up to 28 bits of data, and also supports output of I2S and input NRZ data.

• Can output bi-phase mark signal synchronized with the 128fs bit clock.

• Provides an output pin for the channel status bit 1 non-PCM data detection bit.

• Provides an output pin for the channel status emphasis detection bit.

• Supports a lower-power mode.

• Calculates the input signal sampling frequency and outputs it from the microcontroller interface.

• Can output the first 48 bits of the channel status with the microcontroller interface.

• Can output the 80-bit sub-code Q data with CRC flags via microcontroller interface.

• Outputs various state changes as interrupt signals to the microcontroller interface.

• Equipped with a user definable output port that can be selected from the following functions.

—Microcontroller interface register output (for power saving mode optical module control signals, etc.)

—Signal output of transitional period where VCO clock and external input clock are switched.

• Can dispense with un-used microcontroller control.

• 3.3V single source power supply (Can operate at a minimum voltage of 2.7V.)

• The TTL input ports can support 5V interface operation.

• Package: TSSOP-24