LC72134M中文资料三洋数据手册PDF规格书

Overview

The LC72134M is a dual PLL frequency synthesizer product that integrates on a single chip both an AM/FM audio broadcast reception PLL circuit (main PLL) and a dedicated FM multiplex reception PLL circuit (sub PLL). Since the main PLL circuit is equivalent to the LC72135M, software developed for that product can be used with this chip. The sub-PLL circuit can be controlled independently.

Functions

• High-speed programmable divider

— FMINa (main): 10 to 160 MHz ... Pulse swallower technique (With built-in divide-by-2 prescaler)

— FMINb (sub): 10 to 160 MHz ... Pulse swallower technique (With built-in divide-by-2 prescaler)

— AMIN (main): 0.5 to 40 MHz ... Pulse swallower and direct division techniques

• IF counter

— Two input pins provided: IFIN1 and IFIN2

— IFIN1: 0.4 to 25 MHz ... For AM and FM IF counting

— IFIN2: 0.4 to 25 MHz ... For AM and FM IF counting

• Reference frequency

— One of 12 reference frequencies can be selected (using a 4.5 or 7.2 MHz crystal element) 1, 3, 5, 9, 10, 3.125, 6.25, 12.5*, 15*, 25*, 50*, or 100 kHz

*: Sub PLL reference frequencies

• Phase comparator

— Supports dead zone control.

— Built-in unlocked state detection circuit

— Built-in deadlock clear circuit

• An MOS transistor for an active low-pass filter is built in.

• I/O ports

— Output-only ports: 4 pins

— I/O ports: 1 pin

— Input-only ports: 1 pin (function shared with the IFIN2 pin)

— Supports the output of an 8-Hz clock time base signal.

• CCB interface used for data I/O.

— The main PLL is compatible with the LC72135M.

— The sub PLL can be controlled at an independent address.

• Operating ranges

— Supply voltage: 4.5 to 5.5 V

— Operating temperature: –40 to 85°C

• Package: MFP24S