LAN9312集成电路（IC）的控制器规格书PDF中文资料

Highlights

High performance and full featured 2 port switch with VLAN, QoS packet prioritization, Rate Limiting, IGMP Snooping and management functions

Easily interfaces to most 32-bit embedded CPU’s

Unique Virtual PHY feature simplifies software development by mimicking the multiple switch ports as a single port MAC/PHY

Integrated IEEE 1588 Hardware Time Stamp Unit

Target Applications

Cable, satellite, and IP set-top boxes

Digital televisions

Digital video recorders

VoIP/Video phone systems

Home gateways

Test/Measurement equipment

Industrial automation systems

Key Benefits

Ethernet Switch Fabric

— 32K buffer RAM

— 1K entry forwarding table

— Port based IEEE 802.1Q VLAN support (16 groups)

– Programmable IEEE 802.1Q tag insertion/removal

— IEEE 802.1d spanning tree protocol support

— QoS/CoS Packet prioritization

– 4 dynamic QoS queues per port

– Input priority determined by VLAN tag, DA lookup, TOS, DIFFSERV or port default value

– Programmable class of service map based on input priority

– Remapping of 802.1Q priority field on per port basis

– Programmable rate limiting at the ingress/egress ports with random early discard, per port / priority

— IGMP v1/v2/v3 snooping for Multicast packet filtering

— IPV6 Multicast Listener Discovery snoop

— Programmable filter by MAC address „ Switch Management

— Port mirroring/monitoring/sniffing: ingress and/or egress traffic on any ports or port pairs

— Fully compliant statistics (MIB) gathering counters

— Control registers configurable on-the-fly