K6R1016C1C-I10中文资料三星数据手册PDF规格书

GENERAL DESCRIPTION

The K6R1016C1C is a 1,048,576-bit high-speed Static Random Access Memory organized as 65,536 words by 16 bits. The K6R1016C1C uses 16 common input and output lines and has at output enable pin which operates faster than address access time at read cycle.

FEATURES

• Fast Access Time 10,12,15ns(Max.)

• Low Power Dissipation Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.) 0.5mA(Max.) L-ver. only

Operating K6R1016C1C-10 : 105mA(Max.) K6R1016C1C-12 : 95mA(Max.) K6R1016C1C-15 : 93mA(Max.)

• Single 5.0V±10 Power Supply

• TTL Compatible Inputs and Outputs

• I/O Compatible with 3.3V Device

• Fully Static Operation

- No Clock or Refresh required

• Three State Outputs

• 2V Minimum Data Retention: L-ver. only

• Center Power/Ground Pin Configuration

• Data Byte Control: LB: I/O1~ I/O8, UB: I/O9~ I/O16

• Standard Pin Configuration:

K6R1016C1C-J : 44-SOJ-400

K6R1016C1C-T: 44-TSOP2-400BF

K6R1016C1C-F: 48-Fine pitch BGA with 0.75 Ball pitch