K6R1008C1D-JC10中文资料三星数据手册PDF规格书

GENERAL DESCRIPTION

The K6R1004V1D is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004V1D uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG¢s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R1004V1D is packaged in a 400 mil 32-pin plastic SOJ.

FEATURES

• Fast Access Time 8,10ns(Max.)

• Low Power Dissipation

Standby (TTL) : 20mA(Max.)

(CMOS) : 5mA(Max.)

Operating

K6R1004V1D-08: 80mA(Max.)

K6R1004V1D-10: 65mA(Max.)

• Single 3.3±0.3V Power Supply

• TTL Compatible Inputs and Outputs

• Fully Static Operation

- No Clock or Refresh required

• Three State Outputs

• Center Power/Ground Pin Configuration

• Standard Pin Configuration :

K6R1004V1D-J : 32-SOJ-400

• Operating in Commercial and Industrial Temperature range.