K4S643233F-DESLASHP1H中文资料三星数据手册PDF规格书

GENERAL DESCRIPTION

The K4S643233F is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabri cated with SAMSUNG¢s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications.

FEATURES

• 3.0V & 3.3 power supply.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

• All inputs are sampled at the positive going edge of the system clock .

• Burst read single-bit write operation.

• DQM for masking.

• Auto & self refresh.

• 64ms refresh period (4K cycle).

• Extended temperature operation (-25°C to 85°C). Industrial temperature operation ( -40°C to 85°C).

• 90balls FBGA(-SXXX -Pb, -DXXX -Pb Free).