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K4H640438B-TCB0中文资料PDF规格书
K4H640438B-TCB0规格书详情
Features
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM/DM for write masking only
• Auto & Self refresh
• 15.6us refresh interval(4K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package
产品属性
- 型号:
K4H640438B-TCB0
- 制造商:
SAMSUNG
- 制造商全称:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SAMSUNG/三星 |
19+ |
BGA |
24830 |
进口原装现货 |
询价 | ||
SAMSUNG |
三年内 |
1983 |
纳立只做原装正品13590203865 |
询价 | |||
SAMSUNG |
2020+ |
TSOP66 |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
SAMSUNG |
23+ |
TSOP |
20000 |
原厂原装正品现货 |
询价 | ||
SAMSUNG/三星 |
18+ |
TSOP |
30608 |
全新原装现货,可出样品,可开增值税发票 |
询价 | ||
SAMSUNG/三星 |
23+ |
TSSOP |
6500 |
只做原装正品现货!或订货假一赔十! |
询价 | ||
SANSUNG |
23+ |
60FBGA |
1550 |
特价库存 |
询价 | ||
SAMSUNG/三星 |
21+ |
TSSOP |
6688 |
十年老店,原装正品 |
询价 | ||
SAM |
22+ |
TSOP |
360000 |
进口原装房间现货实库实数 |
询价 | ||
SAMSUNG/三星 |
23+ |
TSOP |
25000 |
代理原装现货,假一赔十 |
询价 |