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K4H560438C-TCB0中文资料PDF规格书
K4H560438C-TCB0规格书详情
Features
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM/DM for write masking only
• Auto & Self refresh
• 15.6us refresh interval(4K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package
产品属性
- 型号:
K4H560438C-TCB0
- 制造商:
SAMSUNG
- 制造商全称:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SAMSUNG/三星 |
19+ |
BGA |
23910 |
进口原装现货 |
询价 | ||
SAMSUNG |
6000 |
面议 |
19 |
TSOP |
询价 | ||
SAMSUNG |
2023+ |
TSOP |
80000 |
一级代理/分销渠道价格优势 十年芯程一路只做原装正品 |
询价 | ||
SAMSUNG |
21+ |
TSOP |
35200 |
一级代理/放心采购 |
询价 | ||
SAMSUNG |
16+ |
QFP |
4000 |
进口原装现货/价格优势! |
询价 | ||
SAMSUNG |
24+ |
QFP |
6500 |
独立分销商,公司只做原装,诚心经营,免费试样正品保证 |
询价 | ||
SAMSUNG/三星 |
2021+ |
BGA |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 | ||
SAMSUNG/三星 |
2019 |
BGA |
55000 |
专营原装正品现货 |
询价 |