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K4H280838C-TCB0中文资料三星数据手册PDF规格书
K4H280838C-TCB0规格书详情
Features
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• LDM,UDM/DM for write masking only
• Auto & Self refresh
• 15.6us refresh interval(4K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package
产品属性
- 型号:
K4H280838C-TCB0
- 制造商:
SAMSUNG
- 制造商全称:
Samsung semiconductor
- 功能描述:
128Mb DDR SDRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SAMSUNG |
20+ |
TSOP |
2960 |
诚信交易大量库存现货 |
询价 | ||
SAMSUNG |
22+ |
TSOP |
8000 |
原装正品支持实单 |
询价 | ||
SAMSUNG? |
22+ |
TSOP? |
5000 |
全新原装现货特价.. |
询价 | ||
SAMSUNG |
589220 |
16余年资质 绝对原盒原盘 更多数量 |
询价 | ||||
SAM |
23+ |
589610 |
新到现货 原厂一手货源 价格秒杀代理! |
询价 | |||
SAMSUNG/三星 |
22+ |
TSOP |
12245 |
现货,原厂原装假一罚十! |
询价 | ||
SAMSANG |
19+ |
TSOP |
256800 |
原厂代理渠道,每一颗芯片都可追溯原厂; |
询价 | ||
SAMSUNG |
6000 |
面议 |
19 |
TSOP |
询价 | ||
SAMSUNG |
2023+ |
TSOP |
700000 |
柒号芯城跟原厂的距离只有0.07公分 |
询价 | ||
SAMSUNG |
23+ |
TSSOP |
20000 |
原厂原装正品现货 |
询价 |